1. Field of the Invention
The present invention relates to a manufacturing method for a semiconductor device, and more particularly relates to a method of manufacturing a MOS transistor for improving reliability of a gate insulation film, and a method of manufacturing an EEPROM cell for improving reliability of a tunnel insulation film.
2. Description of the Related Art
Conventionally, when manufacturing a MOS transistor on a semiconductor substrate, the following process was used in order to improve reliability of a gate oxidation film.
First of all, as shown in FIG. 7A, an element separation film 40 on a silicon semiconductor substrate 39 and a gate insulation film 41 are formed using well known techniques.
Next, as shown in FIG. 7B, nitriding is carried out for the gate insulation film using a well known technique. Normally this nitriding is carried out for a short time at a high temperature, and the reliability of the gate insulation film is improved by this process.
Next, as shown in FIG. 7C, a gate electrode film 42(a) is formed using a well known technique.
Thereafter, as shown in FIG. 7D, the gate electrode film 42(a) is patterned and removed by etching to form a gate electrode film 42(b), and a MOS transistor comprising a transistor source/drain 43, an interlayer insulating film 44, a contact hole 45 and metal wiring 46 is formed by a well known technique.
With the manufacturing method of the related art, since the nitriding process is carried out for a short time at a high temperature after formation of the gate insulation film, a steep temperature gradient and the effects of oxygen cause the following problems.
1. Strain occurs in a silicon semiconductor substrate wafer, and positioning precision of a photolithography process is significantly degraded.
2. Slip lines occur in the silicon semiconductor substrate wafer, which are the cause of IC leak defects etc.
The object of the present invention is to improve a manufacturing method to solve the above described problems.
In a step of forming a MOS transistor on a semiconductor substrate, there is provided, between a process of forming a gate insulation film and a process of patterning a gate electrode film and removing the gate electrode film by etching, means for carrying out annealing using an inert gas.
Here, at least one of the following features is also included.
1. The inert gas is N2.
2. The temperature of annealing with inert gas is at least 925xc2x0 C.
3. After formation of the insulating gate film, RTA (Rapid Thermal Annealing) is carried out in a gas atmosphere including at least one of nitrogen atoms or oxygen atoms.
4. The gas atmosphere including at least one of nitrogen atoms or oxygen atoms is N2O or O2.
5. The temperature of RTA processing is higher than 1000xc2x0 C.
6. After formation of an insulating gate film over the entire surface of the semiconductor substrate, annealing is carried out using an inert gas.
Further, in a step of forming an EEPROM on a semiconductor substrate, there is provided, between a process of forming a tunnel insulation film and a process of patterning a floating gate electrode film and removing the floating gate electrode film by etching, means for carrying out annealing using an inert gas.
Here, at least one of the following features is also included.
1. The inert gas is N2.
2. The temperature of annealing with inert gas is at least 925xc2x0C.
3. After formation of the a tunnel insulating film, RTA (Rapid Thermal Annealing) is carried out in a gas atmosphere including at least one of nitrogen atoms or oxygen atoms.
4. After formation of a floating electrode film over the entire surface of the semiconductor substrate, annealing is carried out using an inert gas.
With the means described above, the manufacturing method of the present invention brings about the following effects.
1. Strain of the semiconductor substrate wafer can be resolved without any increase in contamination of the gate insulation film.
2. It is possible to maintain high positioning precision in a photolithography process after nitriding.
Also, in a step of forming a MOS transistor on a semiconductor substrate, there are provided a process of forming a gate insulation film and, after forming the gate insulation film, means for carrying out heat treatment in a gas atmosphere including oxygen atoms at a temperature of less than 1000xc2x0 C.
Here, at least one of the following features is also included.
1. The gas including oxygen atoms is N2O.
2. The gas including oxygen atoms is O2.
3. Between a step of forming the gate insulating film and a step of carrying out heat treatment in a O2 atmosphere, heat treatment is carried out in a NH3 atmosphere.
4. The heat treatment at less than 1000xc2x0 C. is RTA (Rapid Thermal Annealing).
Also, in a step of forming a MOS transistor on a semiconductor substrate, there are provided a process of forming a gate insulation film and, after forming the gate insulation film, means for carrying out heat treatment in a gas atmosphere including oxygen atoms at a temperature of less than 1000xc2x0 C.
Here, at least one of the following features is also included.
1. The gas including oxygen atoms is N2O.
2. The gas including oxygen atoms is O2.
3. Between a step of forming the gate insulating film and a step of carrying out heat treatment in an O2 atmosphere, heat treatment is carried out in an NH3 atmosphere.
4. The heat treatment at less than 1000xc2x0 C. is RTA (Rapid Thermal Annealing).
With the means described above, the manufacturing method of the present invention brings about the following effects.
1. There is no strain generated in the semiconductor substrate wafer.
2. There are no slip lines generated in the semiconductor substrate wafer.
3. It is possible to maintain high positioning precision in a photolithography process after nitriding.